Power modeling of mobile applications using Hardware Performance Counters

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School of Science | Master's thesis
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Date

2011

Department

Tietotekniikan laitos

Major/Subject

Tietokoneverkot

Mcode

T-110

Degree programme

Language

en

Pages

[9] + 51

Series

Abstract

Power consumption issues are one of the most significant factors affecting the future of performance improvements in modern microprocessors. This is all the more important for mobile and handheld devices running on battery. This work demonstrates a first order, linear power model using Hardware Performance Counters (HPC) to estimate the CPU and memory power consumptions. The experiments are done on a Nokia N810 device based on a TI OMAP 2420 processor. We derive and validate a set of power weights using regression modelling for performance and power and present a general power model. We also present two application specific power models, one for audio player application and one for a video player application. The use of HPC for performance-power prediction seems to be more popular than simulator based approaches which are time consuming and error prone. On most processors, the number of HPCs which can be monitored simultaneously is very limited. To the best of our knowledge, this is the first model based on just 3 HPC. We present our preliminary results from our experiments and discuss how in future this model can be combined with power modelling for data transmissions to create a full system energy profiler of mobile devices.

Description

Supervisor

Ylä-Jääski, Antti

Thesis advisor

Xiao, Yu

Keywords

power modeling, performance counter, mobile devices, regression modeling

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