Low-power front-ends for capacitive three-axis accelerometers

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Volume Title

Aalto-yliopiston teknillinen korkeakoulu | Doctoral thesis (article-based)
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Date

2010

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Mcode

Degree programme

Language

en

Pages

Verkkokirja (849 KB, 82 s.)

Series

TKK dissertations, 243

Abstract

This thesis consists of six publications and an overview of the research topic. The overview concentrates on background information of the capacitive accelerometers and front-ends. The publications focus on two low-power front-ends that were implemented for capacitive three-axis accelerometers and their operation as a part of an interface. The switched-capacitor front-ends that were implemented are based on the charge-balancing structures, namely a self-balancing bridge and a ΔΣ front-end, which convert the capacitive acceleration information to analog and digital signals, respectively. Both structures operate mechanically in open-loop configuration and are capable of reducing the effects of the electrostatic forces and displacement-to-capacitance conversion. According to the performance comparison presented in this thesis, both interfaces, which were implemented around the front-ends, exhibit competitive performance when compared to the commercial products of the day.

Description

Supervising professor

Halonen, Kari, Prof.

Keywords

capacitive three-axis accelerometer, electrostatic forces, front-end, power consumption

Other note

Parts

  • [Publication 1]: Matti Paavola, Mika Kämäräinen, Jere Järvinen, Mikko Saukoski, Mika Laiho, and Kari Halonen. 2007. A 62µA interface ASIC for a capacitive 3-axis micro-accelerometer. In: Digest of Technical Papers of the 2007 IEEE International Solid-State Circuits Conference (ISSCC 2007). San Francisco, CA, USA. 11-15 February 2007. Pages 318-319, 605. ISBN 1-4244-0852-0. © 2007 Institute of Electrical and Electronics Engineers (IEEE). By permission.
  • [Publication 2]: Matti Paavola, Mika Kämäräinen, Jere A. M. Järvinen, Mikko Saukoski, Mika Laiho, and Kari A. I. Halonen. 2007. A micropower interface ASIC for a capacitive 3-axis micro-accelerometer. IEEE Journal of Solid-State Circuits, volume 42, number 12, pages 2651-2665. © 2007 Institute of Electrical and Electronics Engineers (IEEE). By permission.
  • [Publication 3]: Mika Kämäräinen, Mikko Saukoski, Matti Paavola, Jere A. M. Järvinen, Mika Laiho, and Kari A. I. Halonen. 2009. A micropower front end for three-axis capacitive microaccelerometers. IEEE Transactions on Instrumentation and Measurement, volume 58, number 10, pages 3642-3652. © 2009 Institute of Electrical and Electronics Engineers (IEEE). By permission.
  • [Publication 4]: Mika Kämäräinen, Matti Paavola, Mikko Saukoski, Erkka Laulainen, Lauri Koskinen, Marko Kosunen, and Kari Halonen. 2008. A 1.5µW 1V 2nd-order ΔΣ sensor front-end with signal boosting and offset compensation for a capacitive 3-axis micro-accelerometer. In: Digest of Technical Papers of the 2008 IEEE International Solid-State Circuits Conference (ISSCC 2008). San Francisco, CA, USA. 3-7 February 2008. Pages 578-579, 637. ISBN 978-1-4244-2011-7. © 2008 Institute of Electrical and Electronics Engineers (IEEE). By permission.
  • [Publication 5]: Matti Paavola, Mika Kämäräinen, Erkka Laulainen, Mikko Saukoski, Lauri Koskinen, Marko Kosunen, and Kari Halonen. 2008. A 21.2µA ΔΣ-based interface ASIC for a capacitive 3-axis micro-accelerometer. In: Proceedings of the 2008 IEEE Asian Solid-State Circuits Conference (A-SSCC 2008). Fukuoka, Japan. 3-5 November 2008. Pages 101-104. ISBN 978-1-4244-2605-8. © 2008 Institute of Electrical and Electronics Engineers (IEEE). By permission.
  • [Publication 6]: Matti Paavola, Mika Kämäräinen, Erkka Laulainen, Mikko Saukoski, Lauri Koskinen, Marko Kosunen, and Kari A. I. Halonen. 2009. A micropower ΔΣ-based interface ASIC for a capacitive 3-axis micro-accelerometer. IEEE Journal of Solid-State Circuits, volume 44, number 11, pages 3193-3210. © 2009 Institute of Electrical and Electronics Engineers (IEEE). By permission.

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