Two-Dimensional Finite Impulse Response Filter Design Using Field Programmable Gate Arrays

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Journal Title
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Volume Title
Helsinki University of Technology | Diplomityö
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Date
2004
Major/Subject
Systeemitekniikka
Mcode
AS-74
Degree programme
Language
en
Pages
49 s. + liitt.
Series
Description
Supervisor
Hyötyniemi, Heikki
Thesis advisor
Alander, Jarmo
Keywords
image processing, image enhancement, FIR, FPGA, ASIC, DSP, HDL, block based design, compute intensive, parallel processing, serial processing
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