Toward All-Digital Time-Domain Neural Network Accelerators for In-Sensor Processing Applications

dc.contributorAalto-yliopistofi
dc.contributorAalto Universityen
dc.contributor.authorMohey, Ahmed M.en_US
dc.contributor.authorKosunen, Markoen_US
dc.contributor.authorRyynänen, Jussien_US
dc.contributor.authorAndraud, Martinen_US
dc.contributor.departmentMartin Andraud Groupen_US
dc.contributor.departmentDepartment of Electronics and Nanoengineeringen_US
dc.contributor.editorNurmi, Jarien_US
dc.contributor.editorEllervee, Peeteren_US
dc.contributor.editorKoch, Peteren_US
dc.contributor.editorMoradi, Farshaden_US
dc.contributor.editorShen, Mingen_US
dc.date.accessioned2023-11-29T09:35:27Z
dc.date.available2023-11-29T09:35:27Z
dc.date.issued2023-11-01en_US
dc.description.abstractDeep Neural Network (DNN) accelerators are increasingly integrated into sensing applications, such as wearables and sensor networks, to provide advanced in-sensor processing capabilities. Given wearables’ strict size and power requirements, minimizing the area and energy consumption of DNN accelerators is a critical concern. In that regard, computing DNN models in the time domain is a promising architecture, taking advantage of both technology scaling friendliness and efficiency. Yet, time-domain accelerators are typically not fully digital, limiting the full benefits of time-domain computation. In this work, we propose a time-domain multiply and accumulate (MAC) circuitry enabling an all-digital with a small size and low energy consumption to target in-sensor processing. The proposed MAC circuitry features a simple and efficient architecture without dependencies on analog non-idealities such as leakage and charge errors. It is implemented in 22nm FD-SOI technology, occupying 35 μm×35 μm while supporting multi-bit inputs (8-bit) and weights (4-bit). The power dissipation is 46.61 μW at 500MHz, and 20.58 μW at 200MHz. Combining 32 MAC units achieves an average power efficiency, area efficiency and normalized efficiency of 0.45 TOPS/W and 75 GOPS/mm2, and 14.4 1b-TOPS/W.en
dc.description.versionPeer revieweden
dc.format.extent6
dc.format.extent1-6
dc.format.mimetypeapplication/pdfen_US
dc.identifier.citationMohey , A M , Kosunen , M , Ryynänen , J & Andraud , M 2023 , Toward All-Digital Time-Domain Neural Network Accelerators for In-Sensor Processing Applications . in J Nurmi , P Ellervee , P Koch , F Moradi & M Shen (eds) , 2023 IEEE Nordic Circuits and Systems Conference, NorCAS 2023 - Proceedings . , 10305470 , IEEE , pp. 1-6 , IEEE Nordic Circuits and Systems Conference , Aalborg , Denmark , 31/10/2023 . https://doi.org/10.1109/NorCAS58970.2023.10305470en
dc.identifier.doi10.1109/NorCAS58970.2023.10305470en_US
dc.identifier.isbn979-8-3503-3758-7
dc.identifier.otherPURE UUID: 153e2655-afa6-4858-9d37-9ea30a8fda9cen_US
dc.identifier.otherPURE ITEMURL: https://research.aalto.fi/en/publications/153e2655-afa6-4858-9d37-9ea30a8fda9cen_US
dc.identifier.otherPURE LINK: http://www.scopus.com/inward/record.url?scp=85179521093&partnerID=8YFLogxKen_US
dc.identifier.otherPURE FILEURL: https://research.aalto.fi/files/128153428/Mohey_Toward_all-digital_time-domain_neural_network.pdfen_US
dc.identifier.urihttps://aaltodoc.aalto.fi/handle/123456789/124637
dc.identifier.urnURN:NBN:fi:aalto-202311296976
dc.language.isoenen
dc.relation.ispartofIEEE Nordic Circuits and Systems Conferenceen
dc.relation.ispartofseries2023 IEEE Nordic Circuits and Systems Conference (NorCAS)en
dc.rightsopenAccessen
dc.subject.keywordEdge computingen_US
dc.subject.keywordHuman activity recognitionen_US
dc.subject.keywordInertial measurement uniten_US
dc.subject.keywordIn-sensor processingen_US
dc.subject.keywordMultiply-and-accumulateen_US
dc.subject.keywordNeural network acceleratoren_US
dc.subject.keywordSmart sensor interfaceen_US
dc.subject.keywordTime-domain signal processingen_US
dc.titleToward All-Digital Time-Domain Neural Network Accelerators for In-Sensor Processing Applicationsen
dc.typeConference article in proceedingsfi
dc.type.versionacceptedVersion
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