Integrated Radio Frequency LO Circuits for Beamforming Receivers

dc.contributorAalto-yliopistofi
dc.contributorAalto Universityen
dc.contributor.advisorKosunen, Marko, Dr., Aalto University
dc.contributor.authorZahra, Mahwish
dc.contributor.departmentElektroniikan ja nanotekniikan laitosfi
dc.contributor.departmentDepartment of Electronics and Nanoengineeringen
dc.contributor.schoolSähkötekniikan korkeakoulufi
dc.contributor.schoolSchool of Electrical Engineeringen
dc.contributor.supervisorRyynänen, Jussi, Prof., Aalto University, Department of Electronics and Nanoengineering, Finland
dc.date.accessioned2022-02-04T10:00:09Z
dc.date.available2022-02-04T10:00:09Z
dc.date.defence2022-03-04
dc.date.issued2022
dc.description.abstract5th generation (5G) New Radio (NR) demands high data-rate connections for wireless channels that are crowded by interference signals, especially the frequency range 1 (FR1). On the other hand, the desire to integrate more functionality on the same integrated circuit (IC) calls for receivers to operate over a band of several GHz without off-chip channel filters. Beamforming is one effective way to reduce interference and improve the signal-to-noise ratio to enable higher data-rate connections. The choice of beamforming approach impacts the footprint of the receiver's signal chain, and the required dynamic range for blocks before summation. Analog beamforming is a strong candidate for the 5G NR either as a standalone solution or as part of hybrid beamforming, because it reduces the footprint and dynamic range requirements, particularly for the analog-to-digital converters (ADCs). This thesis concentrates on the design of local oscillator (LO) circuits for phase-tuning and true-time-delay beamforming receivers. This is because it can maintain orthogonal gain and phase-tuning, simplify the calibration procedure as well as conserve the linearity and noise figure of the radio frequency (RF) signal path. The research presented in this thesis is based on three receiver front-ends, the focus being the development of LO circuits to enable beamforming. Design 1 is a 2-5.5 GHz 4-element beamforming receiver front-end that applied LO phase-tuning with a >7-bit phase-resolution and 360 degree tuning range. The developed delay line provides divider-less I/Q generation and a compact design (0.008 mm square) with moderate power consumption (2.23-5.6 mW for the reported range) favoring integration of a higher number of beamforming elements. The phase calibration scheme includes pilot-signal generation and baseband detection, being able to measure phase mismatches up to 1 degree (detection through external devices). Design 2 introduces a new true-time-delay (TTD) beamforming architecture that applies RF re-sampling to generate time-delay through discrete-time signal processing. The pulse-skipped LO concept was developed to empower TTD beamforming for large arrays. The implemented LO chain's delay-tuning range with pulse-skipping extends to 3 carrier cycles suitable for an 8-element TTD array. The receiver, operating in degree 6-4 GHz, achieved squint-free beamforming for modulation bandwidth as large as 40% of the LO frequency. Design 3 concentrates on developing LO circuits with mixed-signal techniques for operation at 12-25 GHz to drive the Gilbert cell mixer of the first stage of a heterodyne receiver. The LO chain comprises pulse generation and varactor based phase-tuning blocks. The measurements demonstrate that rail-to-rail LO signalling can be generated, processed and propagated up to 25 GHz in deep submicron processes.en
dc.format.extent87 + app. 51
dc.format.mimetypeapplication/pdfen
dc.identifier.isbn978-952-64-0684-8 (electronic)
dc.identifier.isbn978-952-64-0683-1 (printed)
dc.identifier.issn1799-4942 (electronic)
dc.identifier.issn1799-4934 (printed)
dc.identifier.issn1799-4934 (ISSN-L)
dc.identifier.urihttps://aaltodoc.aalto.fi/handle/123456789/112823
dc.identifier.urnURN:ISBN:978-952-64-0684-8
dc.language.isoenen
dc.opnTenhunen, Hannu, Prof., KTH Royal Institute of Technology, Sweden
dc.publisherAalto Universityen
dc.publisherAalto-yliopistofi
dc.relation.haspart[Publication 1]: M. Zahra, I. Kempi, J. Haarla, Y. Antonov, Z. Khonsari, T. Miilunpalo, N. Ahmed, J. Inkinen, V. Unnikrishnan, A. Lehtovuori, V. Viikari, L. Anttila,M. Valkama, M. Kosunen, K. Stadius and J. Ryynänen. A 2–5.5 GHz Beamsteering Receiver IC With 4-Element Vivaldi Antenna Array. IEEE Transactions on Microwave Theory and Techniques, vol. 68, no. 9, pp. 3852-3860, Sept. 2020. Full text in Acris/Aaltodoc: http://urn.fi/URN:NBN:fi:aalto-202005073027. DOI: 10.1109/TMTT.2020.2986754
dc.relation.haspart[Publication 2]: Y. Antonov, M. Zahra, K. Stadius, Z. Khonsari, I. Kempi, T. Miilunpalo, J. Inkinen, V. Unnikrishnan, L. Anttila, M. Valkama, M. Kosunen and J. Ryynänen. A Delay-Based LO Phase-Shifting Generator for a 2-5GHz Beamsteering Receiver in 28nm CMOS. In the Proceedings of the IEEE 45th European Solid State Circuits Conference (ESSCIRC), Kraków, Poland, 23-26 Sept. 2019 , pp. 389-392. Full text in Acris/Aaltodoc: http://urn.fi/URN:NBN:fi:aalto-202001021206. DOI: 10.1109/ESSCIRC.2019.8902864
dc.relation.haspart[Publication 3]: Y. Antonov, M. Zahra, K. Stadius,Z. Khonsari, N. Ahmed, I. Kempi, J. Inkinen, V. Unnikrishnan and J. Ryynänen. A 3-43ps time-delay cell for LO phase-shifting in 1.5-6.5GHz beamsteering receiver. In the Proceedings of the 2018 16th IEEE International New Circuits and Systems Conference (NEWCAS), Montréal, Canada, 24-27 Jun. 2018, pp. 57-60 . Full text in Acris/Aaltodoc: http://urn.fi/URN:NBN:fi:aalto-201901141190. DOI: 10.1109/NEWCAS.2018.8585704
dc.relation.haspart[Publication 4]: K. Spoof, V. Unnikrishnan, M. Zahra, K. Stadius, M. Kosunen and J. Ryynänen. True-Time-Delay Beamforming Receiver With RF Re-Sampling. IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 12, pp. 4457-4469, Dec 2020. DOI: 10.1109/TCSI.2020.3005475
dc.relation.haspart[Publication 5]: K. Spoof, M. Zahra, V. Unnikrishnan, K. Stadius, M. Kosunen and J. Ryynänen. A 0.6–4.0 GHz RF-Resampling Beamforming Receiver With Frequency-Scaling True-Time-Delays up to Three Carrier Cycles. In IEEE Solid-State Circuits Letters, vol. 3, pp. 234-237, 2020. DOI: 10.1109/LSSC.2020.3012654
dc.relation.ispartofseriesAalto University publication series DOCTORAL THESESen
dc.relation.ispartofseries16/2022
dc.revHella, Mona M., Prof., Rensselaer Polytechnic Institute, USA
dc.revMikkelsen, Jan H., Prof., Aalborg University, Denmark
dc.subject.keywordintegrated circuitsen
dc.subject.keywordRFen
dc.subject.keywordCMOSen
dc.subject.keywordreceiversen
dc.subject.keywordbeamformingen
dc.subject.keywordLOen
dc.subject.keywordphase-tuningen
dc.subject.keywordtrue-time-delayen
dc.subject.otherElectrical engineeringen
dc.titleIntegrated Radio Frequency LO Circuits for Beamforming Receiversen
dc.typeG5 Artikkeliväitöskirjafi
dc.type.dcmitypetexten
dc.type.ontasotDoctoral dissertation (article-based)en
dc.type.ontasotVäitöskirja (artikkeli)fi
local.aalto.acrisexportstatuschecked 2022-02-25_1457
local.aalto.archiveyes
local.aalto.formfolder2022_02_03_klo_15_12

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