Full-Duplex Wireless Transceiver Self-Interference Cancellation Through FD-SOI Buried-Gate Signaling

Full-Duplex (FD) transceiver architectures have recently gained increased attention due to their potential for doubling the theoretical spectral efficiency. One of the main challenges in FD transceivers is the self-interference (SI) from the local transmitter (TX). In this paper we present a novel analog SI cancellation technique through buried-gate signaling in the fully-depleted silicon-on-insulator (FD-SOI) process. The proposed technique attenuates the TX leakage in the receiver (RX) chain before gain is applied. This relaxes the dynamic range requirement of the later RX stages by the amount of attenuation offered by the buried-gate signaling. Further, in comparison to other published analog techniques, the proposed technique offers no penalty on RX noise figure. Measured results in a 28nm FD-SOI technology demonstrate 40–50dB of SI cancellation for TX leakage as high as −10dBm, and above 20dB for TX leakage of −5dBm, with no increase in the RX noise figure.

Keywords

Attenuation, Frequency measurement, Logic gates, Noise measurement, Silicon, Transceivers, Transistors

DOI

10.1109/ISCAS.2018.8351823

Citation

Haq , F U , Englund , M , Antonov , Y , Stadius , K , Kosunen , M , Ryynänen , J , Östman , K B & Koli , K 2018 , Full-Duplex Wireless Transceiver Self-Interference Cancellation Through FD-SOI Buried-Gate Signaling . in 2018 IEEE International Symposium on Circuits and Systems (ISCAS) . IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS PROCEEDINGS , IEEE , pp. 1-5 , IEEE International Symposium on Circuits and Systems , Florence , Italy , 27/05/2018 . https://doi.org/10.1109/ISCAS.2018.8351823

Permanent link to this item

https://urn.fi/URN:NBN:fi:aalto-201812105947

Collections

[article-cris] Sähkötekniikan korkeakoulu / ELEC

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