Box Integration and Boundary Element: Methods for Modeling Substrate Coupling in Integrated Circuits

No Thumbnail Available
Journal Title
Journal ISSN
Volume Title
Helsinki University of Technology | Licentiate thesis
Checking the digitized thesis and permission for publishing
Instructions for the author
Date
2001
Major/Subject
Teoreettinen sähkötekniikka
Mcode
S-55
Degree programme
Language
en
Pages
vi + 49 s. + liitt.
Series
Description
Supervisor
Valtonen, Martti
Thesis advisor
Heleskivi, Jouni
Keywords
substrate coupling, interconnect modeling, integrated circuits, substrate noise, cross-talk, Box Integration Method, Boundary Element Method
Citation