Interfacing digital signal processors with a limited IP stack
Loading...
URL
Journal Title
Journal ISSN
Volume Title
Helsinki University of Technology |
Master's thesis
Checking the digitized thesis and permission for publishing
Instructions for the author
Instructions for the author
Location:
P1 Ark S80
P1 Ark S80
Authors
Date
Department
Major/Subject
Mcode
S-88
Degree programme
Language
en
Pages
10+111
Series
Description
Supervisor
Skyttä, JormaThesis advisor
Varis, PekkaKeywords
DSP, DSP, IP, IP, UDP, UDP, RTP, RTP, UMTS, UMTS, All-IP, All-IP, core network, runkoverkko, user plane, siirtokerros