Design and study of graphene twisted bilayer nanostructures
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Journal Title
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Kemian tekniikan korkeakoulu |
Master's thesis
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Authors
Date
2023-10-10
Department
Major/Subject
Functional Materials for Global Challenges
Mcode
Degree programme
Master's Programme in Advanced Materials for Innovation and Sustainability
Language
en
Pages
66
Series
Abstract
Twisted bilayer graphene (TBG) has emerged as a captivating platform in the field of nanotechnology due to its unique electronic properties which arise from the interplay of lattice misalignment and moiré superlattices. TBG nanostructures are highly sensitive to the twist angle between the top and bottom graphene layers. At the magic angle of 1.1°, TBG exhibits a flat electronic band structure which can lead to the emergence of correlated electronic states and superconductivity. The remarkable tunability of TBG electronic structure via twist angle manipulation and gate voltage has paved the way for designing novel nanoscale electronic devices. In this thesis, the aim relies on the nanofabrication of TBG nanodevices starting by employing a stacking process for the formation of the heterostructure h-BN/TBG/h-BN. Followed by the e-beam lithography technique to transfer the desired pattern onto the surface of the substrate to create the electrodes, top gate, and back gate which are the essential components of the nanodevice. Different metal deposition techniques were employed including MBE, ALD, and sputtering. Finally, four nanodevices were fabricated and only two showed no structural damage. These two nanodevices could be used as platforms for investigating different quantum phenomena including ballistic transport, induced superconductivity, and correlated insulating states. However, due to lack of time and technical problems transport measurements could not be performed. Lastly, CVD monolayer graphene FETs were fabricated using an unconventional approach where the Al2O3 dielectric top gate was created by oxidation of the aluminum gate electrode. Additionally, transport measurements were performed where hysteresis was found due to charge traps at the interface graphene/SiO2 from the back gate.Description
Supervisor
Hakonen, PerttiThesis advisor
Krupke, RalphDanneau, Romain
Keywords
nanofabrication, graphene, heterostructures, dielectric top gate