Benchmarking of Control Kernels on Open-Source RISC-V Processors
dc.contributor | Aalto-yliopisto | fi |
dc.contributor | Aalto University | en |
dc.contributor.advisor | Puri, Subash | |
dc.contributor.author | Ghimire, Narayan | |
dc.contributor.school | Sähkötekniikan korkeakoulu | fi |
dc.contributor.supervisor | Ryynänen, Jussi | |
dc.date.accessioned | 2023-01-29T18:04:56Z | |
dc.date.available | 2023-01-29T18:04:56Z | |
dc.date.issued | 2023-01-23 | |
dc.description.abstract | In recent years, the RISC-V Instruction Set Architecture has emerged as an open-source alternative in the processor market which is dominated by proprietary architectures. The modern telecommunication industry has adopted the RISC-V architecture for accelerating communication data paths. In a telecommunication system, control kernels play a crucial role in managing the underlying hardware to direct the flow of information between devices. A control kernel typically configures the underlying infrastructure for the system and provides services such as scheduling, resource management, and data processing. Such tasks are heavily dependent on configurations of the 5G systems. This thesis presents a study of the telecommunication related control kernel’s performance and power efficiency on open-source RISC-V processors. The open-source RISC-V implementation, CV32E40P, maintained by OpenHW Group is selected for benchmarking against Nokia’s in-house processor core, NRISCV. The processors are synthesized at 1 GHz frequency for 7nm TSMC technology, and power is estimated on the synthesized cores using PowerArtist. The study finds that control kernels' performance and power consumption are largely influenced by the underlying microarchitecture of the RISC-V processor, with some control kernels achieving significantly better performance and power efficiency for specific implementations. This study provides insight into the strengths and weaknesses of different RISC-V processors for control kernel applications and can guide the design and implementation of future telecommunication systems. | en |
dc.format.extent | 56 | |
dc.format.mimetype | application/pdf | en |
dc.identifier.uri | https://aaltodoc.aalto.fi/handle/123456789/119367 | |
dc.identifier.urn | URN:NBN:fi:aalto-202301291717 | |
dc.language.iso | en | en |
dc.location | P1 | fi |
dc.programme | Master’s Programme in Electronics and Nanotechnology (TS2013) | fi |
dc.programme.major | Micro- and Nanoelectronic Circuit Design | fi |
dc.programme.mcode | ELEC3036 | fi |
dc.subject.keyword | RISC-V | en |
dc.subject.keyword | CV32E40P | en |
dc.subject.keyword | PPA analysis | en |
dc.subject.keyword | control kernels | en |
dc.subject.keyword | benchmarks | en |
dc.title | Benchmarking of Control Kernels on Open-Source RISC-V Processors | en |
dc.type | G2 Pro gradu, diplomityö | fi |
dc.type.ontasot | Master's thesis | en |
dc.type.ontasot | Diplomityö | fi |
local.aalto.electroniconly | yes | |
local.aalto.openaccess | yes |
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