A 30-dBm class-D power amplifier with on/off logic for an integrated tri-phasing transmitter in 28-nm CMOS
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Date
2018-08-07
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Language
en
Pages
4
136-139
136-139
Series
Proceedings of the 2018 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2018, Volume 2018-June, IEEE Radio Frequency Integrated Circuits Symposium
Abstract
This paper presents an eight-unit class-D power amplifier (PA), implemented in 28-nm CMOS. The PA is designed to utilize tri-phasing modulation, which combines coarse-amplitude polar modulation with fine-resolution outphasing components. This new technique enables achieving the back-off efficiency of multilevel outphasing without linearity-degrading discontinuities in the output waveform. Each PA unit contains a cascoded output stage with a 3.6-V supply voltage, and on/off logic enabling multilevel operation controlled by low-voltage signals. The PA achieves a peak output power of 29.7 dBm with a 34.7% efficiency, and is verified to operate with aggregated LTE signals at bandwidths up to 60 MHz at 1.7-GHz carrier frequency.Description
Keywords
CMOS integrated circuits, outphasing, power amplifiers, radio transmitters, tri-phasing
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Citation
Martelius, M, Stadius, K, Lemberg, J, Roverato, E, Nieminen, T, Antonov, Y, Anttila, L, Valkama, M, Kosunen, M & Ryynanen, J 2018, A 30-dBm class-D power amplifier with on/off logic for an integrated tri-phasing transmitter in 28-nm CMOS . in Proceedings of the 2018 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2018 . vol. 2018-June, 8429024, IEEE Radio Frequency Integrated Circuits Symposium, IEEE, pp. 136-139, IEEE Radio Frequency Integrated Circuits Symposium, Philadelphia, Pennsylvania, United States, 10/06/2018 . https://doi.org/10.1109/RFIC.2018.8429024
