Integrated Phase Locked Loop and Demultiplexer for 2.5 Gbit/s Telecommunications Receiver
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Helsinki University of Technology |
Diplomityö
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Instructions for the author
Authors
Date
1997
Department
Major/Subject
Piiritekniikka
Mcode
S-87
Degree programme
Language
en
Pages
47
Series
Description
Supervisor
Halonen, KariKeywords
phase locked loop, vaihelukko, phase detector, vaihevertailija, voltage controlled oscillator, jänniteohjattu oskillaattori, demultiplexer, demultiplekseri, SDH, SDH, BiCMOS, BiCMOS