Realization of a capacitance-voltage measurement system for semiconductor characterization

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Sähkötekniikan korkeakoulu | Master's thesis
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Date

2012

Department

Mikro- ja nanotekniikan laitos

Major/Subject

Elektronifysiikka

Mcode

S-69

Degree programme

Language

en

Pages

vii + 71 s.

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Abstract

Capacitance-voltage (CV) measurements are used widely as an effective method for Metal-Insulator-Silicon structures (MIS) characterization. They are electrical measurements able to provide several informations about semiconductor properties. Physical parameters including average doping density, fixed and mobile oxide charges, doping profile and interface trap density can be determined from a single measurement. In this work, a complete capacitance-voltage (CV) measurement system has been developed and implemented. After initial testing it was employed as a valuable instrument for material research and semiconductors characterization. Two different softwares were implemented for data acquisition and following analysis.A study of the precision and the sensitivity properties of the system is also presented. Examples from the real measurements are discussed along with the main issues about the results interpretation and practical procedures. In particular, some results concern the comparison of silicon oxide and atomic layer deposited (ALD) aluminum oxide devices measurements. Finally, conclusions about correct sample preparation and contact fabrication are presented. The difficulties and the different attempts during the development of the system are also presented as a starting point for future improvements.

Description

Supervisor

Savin, Hele

Thesis advisor

Haarahiltunen, Antti

Keywords

electrical measurements, semiconductor, MOS, capacitance, ALD, oxide charge, interface trap density, proling

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https://urn.fi/URN:NBN:fi:aalto-201303191826

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[dipl] Sähkötekniikan korkeakoulu / ELEC