I-V curve hysteresis induced by gate-free charging of GaAs nanowires' surface oxide

The control of nanowire-based device performance requires knowledge about the transport of charge carriers and its limiting factors. We present the experimental and modeled results of a study of electrical properties of GaAs nanowires (NWs), considering their native oxide cover. Measurements of individual vertical NWs were performed by conductive atomic force microscopy (C-AFM). Experimental C-AFM observations with numerical simulations revealed the complex resistive behavior of NWs. A hysteresis of current-voltage characteristics of the p-doped NWs as-grown on substrates with different types of doping was registered. The emergence of hysteresis was explained by the trapping of majority carriers in the surface oxide layer near the reverse-biased barriers under the source-drain current. It was found that the accumulation of charge increases the current for highly doped p+-NWs on n+-substrates, while for moderately doped p-NWs on p+-substrates, charge accumulation decreases the current due to blocking of the conductive channel of NWs.

DOI

10.1063/1.5005125

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Alekseev, P A, Geydt, P, Dunaevskiy, M S, Lähderanta, E, Haggrén, T, Kakko, J P & Lipsanen, H 2017, 'I-V curve hysteresis induced by gate-free charging of GaAs nanowires' surface oxide', Applied Physics Letters, vol. 111, no. 13, 132104. https://doi.org/10.1063/1.5005125

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https://urn.fi/URN:NBN:fi:aalto-201808014098

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[article-cris] Sähkötekniikan korkeakoulu / ELEC

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I-V curve hysteresis induced by gate-free charging of GaAs nanowires' surface oxide

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