Evaluating an Analog Main Memory Architecture for All-Analog In-Memory Computing Accelerators

Abstract

Analog in memory Computing (IMC) has emerged as a promising method to accelerate deep neural networks (DNNs) on hardware efficiently. Yet, analog computation typically focuses on the multiply and accumulate operation, while other operations are still being computed digitally. Hence, these mixed-signal IMC cores require extensive use of data converters, which can take a third of the total energy and area consumption. Alternatively, all-analog DNN computation is possible but requires increasingly challenging analog storage solutions, due to noise and leakage of advanced technologies. To enable all-analog DNN acceleration, this work demonstrates a feasible IMC architecture using an efficient analog main memory (AMM) cell. The proposed AMM cell is 42x and 5x more power and area efficient than a baseline analog storage cell. An all-analog architecture using this cell achieves potential efficiency gains of 15x compared with a mixed-signal IMC core using data converters.