A wideband blocker-resilient direct ΔΣ receiver with selective input-impedance matching

dc.contributorAalto-yliopistofi
dc.contributorAalto Universityen
dc.contributor.authorHaq, Faizan Ulen_US
dc.contributor.authorEnglund, Mikkoen_US
dc.contributor.authorStadius, Karien_US
dc.contributor.authorKosunen, Markoen_US
dc.contributor.authorRyynanen, Jussien_US
dc.contributor.authorKoli, Kimmoen_US
dc.contributor.authorOstman, Kim B.en_US
dc.contributor.departmentDepartment of Micro and Nanosciencesen
dc.contributor.departmentDepartment of Electronics and Nanoengineeringen
dc.contributor.groupauthorJussi Ryynänen Groupen
dc.contributor.organizationHuawei Technologiesen_US
dc.contributor.organizationNordic Semiconductor Oyen_US
dc.date.accessioned2018-12-10T10:30:09Z
dc.date.available2018-12-10T10:30:09Z
dc.date.issued2017-09-25en_US
dc.description.abstractThis paper presents a wideband blocker-tolerant Direct ΔΣ receiver (DDSR). Blockers are attenuated through selective input impedance matching and optimized gain design. The created impedance profile provides low receiver input impedance at blocker frequencies, while at desired frequencies, the impedance is boosted to matched condition through an up-converted positive feedback from the DDSR output. Receiver is evaluated in a 28nm fully-depleted silicon-on-insulator CMOS process with total power consumption of 25mW at 1V supply voltage. The receiver is designed for configurable operation from 0.7-2.7GHz, a baseband bandwidth of 10MHz, demonstrates a maximum noise figure of 6.2dB, and achieves a peak SNDR of 53dB with an out-of-band 1dB input compression point of -11.5dBm at 100MHz offset.en
dc.description.versionPeer revieweden
dc.format.extent4
dc.format.mimetypeapplication/pdfen_US
dc.identifier.citationHaq, F U, Englund, M, Stadius, K, Kosunen, M, Ryynanen, J, Koli, K & Ostman, K B 2017, A wideband blocker-resilient direct ΔΣ receiver with selective input-impedance matching . in IEEE International Symposium on Circuits and Systems : From Dreams to Innovation, ISCAS 2017 - Conference Proceedings ., 8050249, IEEE International Symposium on Circuits and Systems proceedings, IEEE, IEEE International Symposium on Circuits and Systems, Baltimore, Maryland, United States, 28/05/2017 . https://doi.org/10.1109/ISCAS.2017.8050249en
dc.identifier.doi10.1109/ISCAS.2017.8050249en_US
dc.identifier.isbn9781467368520
dc.identifier.issn2379-447X
dc.identifier.otherPURE UUID: c854e614-79f2-474e-8d20-406bbafa32e2en_US
dc.identifier.otherPURE ITEMURL: https://research.aalto.fi/en/publications/c854e614-79f2-474e-8d20-406bbafa32e2en_US
dc.identifier.otherPURE LINK: http://www.scopus.com/inward/record.url?scp=85032664502&partnerID=8YFLogxKen_US
dc.identifier.otherPURE FILEURL: https://research.aalto.fi/files/27868305/ELEC_UlHaq_et_al_ISCAS2017.pdfen_US
dc.identifier.urihttps://aaltodoc.aalto.fi/handle/123456789/35268
dc.identifier.urnURN:NBN:fi:aalto-201812106283
dc.language.isoenen
dc.relation.ispartofIEEE International Symposium on Circuits and Systemsen
dc.relation.ispartofseriesIEEE International Symposium on Circuits and Systemsen
dc.relation.ispartofseriesIEEE International Symposium on Circuits and Systems proceedingsen
dc.rightsopenAccessen
dc.titleA wideband blocker-resilient direct ΔΣ receiver with selective input-impedance matchingen
dc.typeA4 Artikkeli konferenssijulkaisussafi
dc.type.versionacceptedVersion

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