Fully Digital On-Chip Wideband Background Calibration for Channel Mismatches in Time-Interleaved Time-Based ADCs

dc.contributorAalto-yliopistofi
dc.contributorAalto Universityen
dc.contributor.authorJarvinen, Okko
dc.contributor.authorKempi, Ilia
dc.contributor.authorUnnikrishnan, Vishnu
dc.contributor.authorStadius, Kari
dc.contributor.authorKosunen, Marko
dc.contributor.authorRyynänen, Jussi
dc.contributor.departmentJussi Ryynänen Group
dc.contributor.departmentDepartment of Electronics and Nanoengineering
dc.date.accessioned2022-02-16T07:41:08Z
dc.date.available2022-02-16T07:41:08Z
dc.date.issued2022-01-24
dc.description.abstractThis letter presents a fully integrated on-chip digital mismatch compensation system for time-based time-interleaved (TI) data converters. The proposed digital compensation features blind calibration of gain, offset, and timing mismatches. The implemented system uses time-based sampling clock mismatch detection, achieving convergence within 32K samples, which is on par with analog-assisted background methods. A specialized filter structure compensates for timing mismatches of magnitude up to 0.21 of the sampling period, nearly triple the range of other published digital compensation methods, and is effective for input signals up to 0.92 Nyquist bandwidth. The on-chip digital correction achieves suppression of all mismatch tones to levels below −60 dBc while running fully in the background. The operation is demonstrated with an 8× TI 2-GS/s analog-to-digital converter (ADC) prototype chip implemented in a 28-nm CMOS process.en
dc.description.versionPeer revieweden
dc.format.extent4
dc.format.extent9-12
dc.format.mimetypeapplication/pdf
dc.identifier.citationJarvinen , O , Kempi , I , Unnikrishnan , V , Stadius , K , Kosunen , M & Ryynänen , J 2022 , ' Fully Digital On-Chip Wideband Background Calibration for Channel Mismatches in Time-Interleaved Time-Based ADCs ' , IEEE Solid-State Circuits Letters , vol. 5 , pp. 9-12 . https://doi.org/10.1109/LSSC.2022.3145918en
dc.identifier.doi10.1109/LSSC.2022.3145918
dc.identifier.issn2573-9603
dc.identifier.otherPURE UUID: c78f4697-1fcc-46bc-abcd-787192317d8a
dc.identifier.otherPURE ITEMURL: https://research.aalto.fi/en/publications/c78f4697-1fcc-46bc-abcd-787192317d8a
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dc.identifier.otherPURE FILEURL: https://research.aalto.fi/files/79167855/Fully_Digital_On_Chip_Wideband_Background_Calibration_for_Channel_Mismatches_in_Time_Interleaved_Time_Based_ADCs.pdf
dc.identifier.urihttps://aaltodoc.aalto.fi/handle/123456789/113050
dc.identifier.urnURN:NBN:fi:aalto-202202161942
dc.language.isoenen
dc.publisherIEEE
dc.relation.ispartofseriesIEEE Solid-State Circuits Lettersen
dc.relation.ispartofseriesVolume 5en
dc.rightsopenAccessen
dc.subject.keywordtime based
dc.subject.keywordtime interleaving
dc.subject.keywordanalog-to-digital converter (ADC)
dc.subject.keywordcyclic-coupled ring oscillator (CCRO)
dc.subject.keyworddigital calibration
dc.subject.keywordfinite-impulse response (FIR)
dc.subject.keywordleast mean-square (LMS)
dc.subject.keywordmismatch
dc.subject.keywordtiming skew
dc.titleFully Digital On-Chip Wideband Background Calibration for Channel Mismatches in Time-Interleaved Time-Based ADCsen
dc.typeA1 Alkuperäisartikkeli tieteellisessä aikakauslehdessäfi
dc.type.versionpublishedVersion
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