All digital phase-locked loop in 40 nm CMOS

dc.contributorAalto-yliopistofi
dc.contributorAalto Universityen
dc.contributor.advisorStadius, Kari
dc.contributor.advisorTikka, Tero
dc.contributor.authorAntonov, Yury
dc.contributor.schoolSähkötekniikan korkeakoulufi
dc.contributor.supervisorRyynänen, Jussi
dc.date.accessioned2014-02-17T11:20:37Z
dc.date.available2014-02-17T11:20:37Z
dc.date.issued2014-02-10
dc.format.extent74
dc.identifier.urihttps://aaltodoc.aalto.fi/handle/123456789/12594
dc.identifier.urnURN:NBN:fi:aalto-201402191433
dc.language.isoenen
dc.locationP1fi
dc.programmeEST - Master’s Programme in Micro and Nanotechnologyfi
dc.programme.majorElectronic Circuit Designfi
dc.programme.mcodeS3010fi
dc.rights.accesslevelclosedAccess
dc.subject.keywordall-digital phase locked loopen
dc.subject.keywordcharge-pump-based phase locked loopen
dc.subject.keyworddigitally controlled oscillatoren
dc.subject.keywordfrequency synthesisen
dc.subject.keywordtime-to-digital converteren
dc.titleAll digital phase-locked loop in 40 nm CMOSen
dc.typeG2 Pro gradu, diplomityöen
dc.type.okmG2 Pro gradu, diplomityö
dc.type.ontasotDiplomityöfi
dc.type.ontasotMaster's thesisen
dc.type.publicationmasterThesis
local.aalto.digifolderAalto_05361
local.aalto.idinssi48687
local.aalto.openaccessno
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