All digital phase-locked loop in 40 nm CMOS
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Journal Title
Journal ISSN
Volume Title
Sähkötekniikan korkeakoulu |
Master's thesis
Author
Date
2014-02-10
Department
Major/Subject
Electronic Circuit Design
Mcode
S3010
Degree programme
EST - Master’s Programme in Micro and Nanotechnology
Language
en
Pages
74
Series
Description
Supervisor
Ryynänen, JussiThesis advisor
Stadius, KariTikka, Tero
Keywords
all-digital phase locked loop, charge-pump-based phase locked loop, digitally controlled oscillator, frequency synthesis, time-to-digital converter