Design of power management unit for low power SoCs in 65nm CMOS technology

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dc.contributorAalto-yliopistofi
dc.contributorAalto Universityen
dc.contributor.advisorPulkkinen, Mika
dc.contributor.authorMonga, Dipesh
dc.contributor.schoolSähkötekniikan korkeakoulufi
dc.contributor.supervisorHalonen, Kari
dc.date.accessioned2020-05-24T17:07:23Z
dc.date.available2020-05-24T17:07:23Z
dc.date.issued2020-05-18
dc.format.extent81+1
dc.identifier.urihttps://aaltodoc.aalto.fi/handle/123456789/44318
dc.identifier.urnURN:NBN:fi:aalto-202005243275
dc.language.isoenen
dc.locationP1fi
dc.programmeMaster's Programme in Electronics and Nanotechnology (TS2013)fi
dc.programme.majorMicro- and Nanoelectronic Circuit Designfi
dc.programme.mcodeELEC3036fi
dc.subject.keywordinternet of thingsen
dc.subject.keywordpower management uniten
dc.subject.keywordDC DC convertersen
dc.subject.keywordsystem on chipen
dc.subject.keywordclock generatoren
dc.subject.keywordcurrent referenceen
dc.titleDesign of power management unit for low power SoCs in 65nm CMOS technologyen
dc.titleMicro- and Nanoelectronic Circuit Designfi
dc.typeG2 Pro gradu, diplomityöfi
dc.type.ontasotMaster's thesisen
dc.type.ontasotDiplomityöfi
local.aalto.electroniconlyyes
local.aalto.openaccessno

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