An integrated low voltage 150Mbit/s cable communication circuit and a CMOS clock recovery phase and frequency locked loop

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Journal ISSN
Volume Title
Helsinki University of Technology | Licentiate thesis
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Date
1998
Major/Subject
Piiritekniikka
Mcode
S-87
Degree programme
Language
en
Pages
58
Series
Description
Supervisor
Halonen, Kari
Thesis advisor
Koli, Kimmo
Keywords
Jitter, Jitteri, PLL, kuollut alue, dead zone, korjain, equalizer, prosessi ja lämpötila hajonnat, process and temperature variations, matala käyttöjännite, low voltage
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