Development of the speed and convergence of APLAC's DC analysis by means of interpolated and piecewise-linear models
| dc.contributor | Aalto-yliopisto | fi |
| dc.contributor | Aalto University | en |
| dc.contributor.author | Roos, Janne | |
| dc.contributor.department | Sähkötekniikan osasto | fi |
| dc.contributor.school | Teknillinen korkeakoulu | fi |
| dc.contributor.school | Helsinki University of Technology | en |
| dc.contributor.supervisor | Valtonen, Martti | |
| dc.date.accessioned | 2021-04-14T18:20:23Z | |
| dc.date.available | 2021-04-14T18:20:23Z | |
| dc.date.issued | 1996 | |
| dc.format.extent | 97 | |
| dc.identifier.uri | https://aaltodoc.aalto.fi/handle/123456789/105581 | |
| dc.identifier.urn | URN:NBN:fi:aalto-202104144871 | |
| dc.language.iso | en | en |
| dc.programme.major | Teoreettinen sähkötekniikka | fi |
| dc.programme.mcode | S-55 | fi |
| dc.rights.accesslevel | closedAccess | |
| dc.subject.keyword | DC analysis | en |
| dc.subject.keyword | interpolation | en |
| dc.subject.keyword | lookup tables | en |
| dc.subject.keyword | nonlinear circuits | en |
| dc.subject.keyword | piecewise-linear models | en |
| dc.title | Development of the speed and convergence of APLAC's DC analysis by means of interpolated and piecewise-linear models | en |
| dc.title | APLACin DC-analyysin nopeuden ja suppenemisen kehittäminen interpoloitujen ja paloittain lineaaristen mallien avulla | fi |
| dc.type.okm | G3 Lisensiaatintutkimus | |
| dc.type.ontasot | Licentiate thesis | en |
| dc.type.ontasot | Lisensiaatintyö | fi |
| local.aalto.digiauth | ask | |
| local.aalto.digifolder | Aalto_39698 | |
| local.aalto.idinssi | 11233 | |
| local.aalto.openaccess | no |