Modeling of digital components in the APLAC circuit simulator
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Helsinki University of Technology |
Diplomityö
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Date
2002
Department
Major/Subject
Teoreettinen sähkötekniikka
Mcode
S-55
Degree programme
Language
en
Pages
61
Series
Description
Supervisor
Valtonen, MarttiKeywords
model, malli, digital component, digitaalikomponentti, electrical properties, sähköiset ominaisuudet, delay, viive, mixed-mode analysis, sekamuotoanalyysi, APLAC, APLAC