A Compact Untrimmed 48ppm/°C All MOS Current Reference Circuit

dc.contributorAalto-yliopistofi
dc.contributorAalto Universityen
dc.contributor.authorMonga, Dipesh C.en_US
dc.contributor.authorHalonen, Karien_US
dc.contributor.departmentDepartment of Electronics and Nanoengineeringen
dc.contributor.groupauthorKari Halonen Groupen
dc.date.accessioned2022-10-19T06:41:08Z
dc.date.available2022-10-19T06:41:08Z
dc.date.issued2022en_US
dc.descriptionFunding Information: The authors are grateful to Academy of Finland for funding this work under the project EHIR (Wireless impulse radio data link powered by energy harvesting). Publisher Copyright: © 2022 IEEE.
dc.description.abstractAn ultra-low power and low-cost (area efficient) nano-Ampere current reference circuit designed in a 65 nm technology is presented in this paper: The proposed circuit is a resistorless beta multiplier current reference circuit that uses self cascode composite MOSFETs in triode region. Circuit analysis has been discussed in the paper. The simulated circuit consumes power of 550 nW at a nominal operating voltage of 1.33 V and occupies area of 0.0031 mm2. The design provides a line regulation of 1.9 %/V over an operating voltage range of 1.25 V to 1.4 V. Temperature coefficient (TC) of the circuit at nominal voltage of 1.33 V is 48 ppm/°C for a wide temperature range of-40°C to 85°C. Output current of the circuit at nominal voltage is 104.2 nA with a small process variation of only 4 %.en
dc.description.versionPeer revieweden
dc.format.extent5
dc.format.mimetypeapplication/pdfen_US
dc.identifier.citationMonga, D C & Halonen, K 2022, A Compact Untrimmed 48ppm/°C All MOS Current Reference Circuit . in MWSCAS 2022 - 65th IEEE International Midwest Symposium on Circuits and Systems, Proceedings . Conference proceedings : Midwest Symposium on Circuits and Systems, IEEE, International Midwest Symposium on Circuits and Systems, Fukuoka, Japan, 07/08/2022 . https://doi.org/10.1109/MWSCAS54063.2022.9859347en
dc.identifier.doi10.1109/MWSCAS54063.2022.9859347en_US
dc.identifier.isbn9781665402798
dc.identifier.issn1548-3746
dc.identifier.issn1558-3899
dc.identifier.otherPURE UUID: 06e57d77-4adc-4415-be2f-21f00295331den_US
dc.identifier.otherPURE ITEMURL: https://research.aalto.fi/en/publications/06e57d77-4adc-4415-be2f-21f00295331den_US
dc.identifier.otherPURE LINK: http://www.scopus.com/inward/record.url?scp=85137500044&partnerID=8YFLogxKen_US
dc.identifier.otherPURE FILEURL: https://research.aalto.fi/files/88825851/Dipesh_A_Compact_Untrimmed_48ppm.pdfen_US
dc.identifier.urihttps://aaltodoc.aalto.fi/handle/123456789/117164
dc.identifier.urnURN:NBN:fi:aalto-202210195952
dc.language.isoenen
dc.relation.ispartofInternational Midwest Symposium on Circuits and Systemsen
dc.relation.ispartofseriesMWSCAS 2022 - 65th IEEE International Midwest Symposium on Circuits and Systems, Proceedingsen
dc.relation.ispartofseriesConference proceedings : Midwest Symposium on Circuits and Systemsen
dc.rightsopenAccessen
dc.subject.keywordCMOS beta multiplieren_US
dc.subject.keywordCurrent referenceen_US
dc.subject.keywordlow temperature coefficienten_US
dc.subject.keywordlow-poweren_US
dc.subject.keywordself-cascode transistoren_US
dc.titleA Compact Untrimmed 48ppm/°C All MOS Current Reference Circuiten
dc.typeA4 Artikkeli konferenssijulkaisussafi
dc.type.versionacceptedVersion

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