A Configurable Hysteresis Comparator for Asynchronous Sigma-Delta Modulators
| dc.contributor | Aalto-yliopisto | fi |
| dc.contributor | Aalto University | en |
| dc.contributor.author | Olabode, Olaitan | en_US |
| dc.contributor.author | Unnikrishnan, Vishnu | en_US |
| dc.contributor.author | Kempi, Ilia | en_US |
| dc.contributor.author | Hammer, Andreas | en_US |
| dc.contributor.author | Kosunen, Marko | en_US |
| dc.contributor.author | Ryynänen, Jussi | en_US |
| dc.contributor.department | Department of Electronics and Nanoengineering | en |
| dc.contributor.groupauthor | Jussi Ryynänen Group | en |
| dc.date.accessioned | 2019-01-30T15:07:29Z | |
| dc.date.available | 2019-01-30T15:07:29Z | |
| dc.date.issued | 2018-12-13 | en_US |
| dc.description.abstract | This paper describes a configurable hysteresis comparator for asynchronous sigma-delta modulators (ASDM). The proposed comparator provides coarse and fine tuning options for configuring the loop delay and hence the frequency of an ASDM. The post-layout simulation of the comparator implemented in a 28 nm FDSOI process shows that the comparator provides hysteresis voltage range of ±(1 to 15.3) mV while consuming 36.8 nW to 4.4 uW from 0.7 V supply, which enables configurable ASDM center-frequency in the range of 100 kHz to 6 MHz. | en |
| dc.description.version | Peer reviewed | en |
| dc.format.extent | 4 | |
| dc.format.extent | 1-4 | |
| dc.format.mimetype | application/pdf | en_US |
| dc.identifier.citation | Olabode, O, Unnikrishnan, V, Kempi, I, Hammer, A, Kosunen, M & Ryynänen, J 2018, A Configurable Hysteresis Comparator for Asynchronous Sigma-Delta Modulators . in 2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC) ., 8573454, IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC), IEEE, pp. 1-4, IEEE Nordic Circuits and Systems Conference, Tallinn, Estonia, 30/10/2018 . https://doi.org/10.1109/NORCHIP.2018.8573454 | en |
| dc.identifier.doi | 10.1109/NORCHIP.2018.8573454 | en_US |
| dc.identifier.isbn | 978-1-5386-7657-8 | |
| dc.identifier.isbn | 978-1-5386-7656-1 | |
| dc.identifier.other | PURE UUID: 1f79e255-096a-4a5f-b53f-7cfbd3ee9ff2 | en_US |
| dc.identifier.other | PURE ITEMURL: https://research.aalto.fi/en/publications/1f79e255-096a-4a5f-b53f-7cfbd3ee9ff2 | en_US |
| dc.identifier.other | PURE LINK: https://ieeexplore.ieee.org/document/8573454 | en_US |
| dc.identifier.other | PURE FILEURL: https://research.aalto.fi/files/30451738/PID5628111.pdf | en_US |
| dc.identifier.uri | https://aaltodoc.aalto.fi/handle/123456789/36227 | |
| dc.identifier.urn | URN:NBN:fi:aalto-201901301397 | |
| dc.language.iso | en | en |
| dc.publisher | IEEE | |
| dc.relation.ispartof | Nordic Circuits and Systems Conference | en |
| dc.relation.ispartofseries | 2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC) | en |
| dc.relation.ispartofseries | IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC) | en |
| dc.rights | openAccess | en |
| dc.subject.keyword | configurable hysteresis, comparator, asynchronous, sigma-delta, modulator, ADC | en_US |
| dc.subject.keyword | Hysteresis;Delays;Tuning;Frequency modulation;Transistors;Power demand, CMOS, Low Power | en_US |
| dc.title | A Configurable Hysteresis Comparator for Asynchronous Sigma-Delta Modulators | en |
| dc.type | A4 Artikkeli konferenssijulkaisussa | fi |
| dc.type.version | acceptedVersion |