A Configurable Hysteresis Comparator for Asynchronous Sigma-Delta Modulators

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Journal Title
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Volume Title
Conference article in proceedings
Date
2018-12-13
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Degree programme
Language
en
Pages
4
1-4
Series
2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC), IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)
Abstract
This paper describes a configurable hysteresis comparator for asynchronous sigma-delta modulators (ASDM). The proposed comparator provides coarse and fine tuning options for configuring the loop delay and hence the frequency of an ASDM. The post-layout simulation of the comparator implemented in a 28 nm FDSOI process shows that the comparator provides hysteresis voltage range of ±(1 to 15.3) mV while consuming 36.8 nW to 4.4 uW from 0.7 V supply, which enables configurable ASDM center-frequency in the range of 100 kHz to 6 MHz.
Description
Keywords
configurable hysteresis, comparator, asynchronous, sigma-delta, modulator, ADC, Hysteresis;Delays;Tuning;Frequency modulation;Transistors;Power demand, CMOS, Low Power
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Citation
Olabode, O, Unnikrishnan, V, Kempi, I, Hammer, A, Kosunen, M & Ryynänen, J 2018, A Configurable Hysteresis Comparator for Asynchronous Sigma-Delta Modulators . in 2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC) ., 8573454, IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC), IEEE, pp. 1-4, IEEE Nordic Circuits and Systems Conference, Tallinn, Estonia, 30/10/2018 . https://doi.org/10.1109/NORCHIP.2018.8573454