Reliability of high-density lead-free solder interconnections under thermal cycling and mechanical shock loading

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Doctoral thesis (article-based)
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Report series / Helsinki University of Technology, Laboratory of Electronics Production Technology, 13
The reliability of portable electronic devices was studied by applying standardized test procedures for test vehicles that represent the technologies and lead-free materials typically used in novel portable products. Thermal cycling and drop testing are commonly used because they reveal the failure modes and mechanisms that portable devices experience in operational environments. A large number of component boards were assembled in a full-scale production line to enable proper statistical and fractographic analyses. The test boards were assembled with different printed wiring board protective coatings, component under bump metallizations, and solder pad structures. The component boards were tested and the times-to-failure of the various combinations were statistically analyzed. The reliability data were also analyzed by the Weibull method, and the characteristic lifetimes and shape parameters were calculated. The failure modes under the thermal cycling, where solder interconnections fail by cracking through the bulk solder, were different from those observed in the drop tests, where cracks propagate along the intermetallic layers on either side of the interconnections. Under the thermomechanical loading the as-soldered microstructure, which is composed of only a few large eutectic colonies, undergoes local recrystallization that produces networks of grain boundaries along which the intergranular cracks damage solder interconnections. Under the mechanical shock loading, in turn, the strain–rate hardening of the solder material forces cracks to propagate in the intermetallic layers instead of the bulk solder. It was found that the reliability of solder interconnections can improve when the component boards have undergone thermal cycles before drop testing. The high-angle boundaries between the recrystallized grains generated during thermal cycling provide paths along which cracks can propagate but the propagation through the bulk solder consumes more energy than the propagation through brittle intermetallic layers. On the other hand, prolonged lifetime at elevated temperatures can reduce the drop test reliability considerably due to the formation of Kirkendall voids in the Cu3Sn intermetallic layers.
drop testing, failure mechanism, failure mode, chip-scale package, lead-free
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  • Additional errata file available.
  • T. T. Mattila, V. Vuorinen, and J. K. Kivilahti, Impact of printed wiring board coatings on the reliability of lead-free chip-scale package interconnections, Journal of Materials Research, 19, 11, (2004), pp. 3214-3223. [article1.pdf] © 2004 Materials Research Society. By permission.
  • T. T. Mattila, P. Marjamäki, and J. K. Kivilahti, Reliability of CSP interconnections under mechanical shock loading conditions, IEEE Transactions on Components and Packaging Technologies, 29, 4, (2006), pp. 787-795. [article2.pdf] © 2006 IEEE. By permission.
  • T. T. Mattila and J. K. Kivilahti, Failure mechanisms of lead-free chip scale package interconnections under fast mechanical loading, Journal of Electronic Materials, 34, 7, (2005), pp. 969-976. [article3.pdf] © 2005 The Minerals, Metals & Materials Society (TMS). By permission.
  • T. T. Mattila and J. K. Kivilahti, Reliability of lead-free interconnections under consecutive thermal and mechanical loadings, Journal of Electronic Materials, 35, 2, (2006), pp. 250-256. [article4.pdf] © 2006 The Minerals, Metals & Materials Society (TMS). By permission.
  • T. T. Mattila, T. Laurila, and J. K. Kivilahti, Metallurgical factors behind the reliability of high-density lead-free interconnections, In: E. Suhir, C. P. Wong, and Y. C. Lee, Micro- and Opto-Electronic Materials and Structures: Physics, Mechanics, Design, Reliability, Packaging. [article5.pdf] © 2005 by authors and © 2005 Springer Science+Business Media. By permission.
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