Learning Centre

A Systematic Design Method for Direct Delta-Sigma Receivers

 |  Login

Show simple item record

dc.contributor Aalto-yliopisto fi
dc.contributor Aalto University en
dc.contributor.author Englund, Mikko
dc.contributor.author Ul Haq, Faizan
dc.contributor.author Stadius, Kari
dc.contributor.author Kosunen, Marko
dc.contributor.author Ostman, Kim B.
dc.contributor.author Koli, Kimmo
dc.contributor.author Ryynanen, Jussi
dc.date.accessioned 2019-01-30T15:07:09Z
dc.date.available 2019-01-30T15:07:09Z
dc.date.issued 2018-08
dc.identifier.citation Englund , M , Ul Haq , F , Stadius , K , Kosunen , M , Ostman , K B , Koli , K & Ryynanen , J 2018 , ' A Systematic Design Method for Direct Delta-Sigma Receivers ' , IEEE Transactions on Circuits and Systems I: Regular Papers , vol. 65 , no. 8 , pp. 2389-2402 . https://doi.org/10.1109/TCSI.2017.2777895 en
dc.identifier.issn 1549-8328
dc.identifier.other PURE UUID: 0ea077ab-2959-4f61-b08d-fb2954a3f6f3
dc.identifier.other PURE ITEMURL: https://research.aalto.fi/en/publications/a-systematic-design-method-for-direct-deltasigma-receivers(0ea077ab-2959-4f61-b08d-fb2954a3f6f3).html
dc.identifier.other PURE LINK: http://www.scopus.com/inward/record.url?scp=85038400961&partnerID=8YFLogxK
dc.identifier.other PURE FILEURL: https://research.aalto.fi/files/31289334/ELEC_Englund_et_al_Systematic_Design_IEEETRansonCircuits1.pdf
dc.identifier.uri https://aaltodoc.aalto.fi/handle/123456789/36220
dc.description.abstract Next generation receivers, such as the direct ΔΣ receiver (DDSR), shift the boundary between analog and digital closer to the antenna by merging the functionalities of different sub-blocks. In the DDSR, the analog components are used to their maximum potential as each stage participates in amplification, blocker filtering, anti-aliasing, and quantization noise shaping simultaneously, resulting in a compact design. To overcome the increased design complexity, the implemented DDSRs rely on common practices in receiver and ΔΣ modulator design. In this paper, we will show that the common design practices for neither receivers nor ΔΣ modulators yield optimal performance for the DDSR, and propose a systematic design method for gmC based DDSRs. The method enables improved performance and a straight-forward design flow by combining the gain partitioning, noise considerations, and loop-filter design. The developed method is demonstrated by designing a gmC based DDSR using a 28 nm FDSOI CMOS process. Simulations of the DDSR indicate state-of-the-art performance. en
dc.format.extent 14
dc.format.extent 2389-2402
dc.format.mimetype application/pdf
dc.language.iso en en
dc.relation.ispartofseries IEEE Transactions on Circuits and Systems I: Regular Papers en
dc.relation.ispartofseries Volume 65, issue 8 en
dc.rights openAccess en
dc.title A Systematic Design Method for Direct Delta-Sigma Receivers en
dc.type A1 Alkuperäisartikkeli tieteellisessä aikakauslehdessä fi
dc.description.version Peer reviewed en
dc.contributor.department Department of Electronics and Nanoengineering
dc.contributor.department Nordic Semiconductor Oy
dc.contributor.department Huawei Technologies
dc.subject.keyword analog-digital conversion
dc.subject.keyword delta-sigma modulation
dc.subject.keyword Design methodology
dc.subject.keyword direct delta-sigma receiver.
dc.subject.keyword Gain
dc.subject.keyword Logic gates
dc.subject.keyword Modulation
dc.subject.keyword Quantization (signal)
dc.subject.keyword Receivers
dc.subject.keyword receivers
dc.subject.keyword RF-to-digital converters
dc.subject.keyword Systematics
dc.identifier.urn URN:NBN:fi:aalto-201901301390
dc.identifier.doi 10.1109/TCSI.2017.2777895
dc.type.version acceptedVersion

Files in this item

Files Size Format View

There are no open access files associated with this item.

This item appears in the following Collection(s)

Show simple item record

Search archive

Advanced Search

article-iconSubmit a publication