Fabrication of SOI micromechanical devices

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dc.contributor Aalto-yliopisto fi
dc.contributor Aalto University en
dc.contributor.author Kiihamäki, Jyrki
dc.date.accessioned 2012-02-17T06:48:55Z
dc.date.available 2012-02-17T06:48:55Z
dc.date.issued 2005-04-15
dc.identifier.isbn 951-38-6436-7
dc.identifier.issn 1455-0849
dc.identifier.uri https://aaltodoc.aalto.fi/handle/123456789/2535
dc.description.abstract This work reports on studies and the fabrication process development of micromechanical silicon-on-insulator (SOI) devices. SOI is a promising starting material for fabrication of single crystal silicon micromechanical devices and basis for monolithic integration of sensors and integrated circuits. The buried oxide layer of an SOI wafer offers an excellent etch stop layer for silicon etching and sacrificial layer for fabrication of capacitive sensors. Deep silicon etching is studied and the aspect ratio dependency of the etch rate and loading effects are described and modeled. The etch rate of the deep silicon etching process is modeled with a simple flow conductance model, which takes into account only the initial etch rate and reaction probability and flow resistance of the etched feature. The used model predicts qualitatively the aspect-ratio-dependent etch rate for varying trench widths and rectangular shapes. The design related loading can be modeled and the effects of the loading can be minimized with proper etch mask design. The basic SOI micromechanics process is described and the drawbacks and limitations of the process are discussed. Improvements to the process are introduced as well as IR microscopy as a new method to inspect the sacrificial etch length of the SOI structure. A new fabrication process for SOI micromechanics has been developed that alleviates metallization problems during the wet etching of the sacrificial layer. The process is based on forming closed cavities under the structure layer of SOI with the help of a semi-permeable polysilicon film. Prototype SOI device fabrication results are presented. High Q single crystal silicon micro resonators have potential for replacing bulky quartz resonators in clock circuits. Monolithic integration of micromechanical devices and an integrated circuit has been demonstrated with the developed process using the embedded vacuum cavities. en
dc.format.extent 87, [28]
dc.format.mimetype application/pdf
dc.language.iso en en
dc.publisher VTT Technical Research Centre of Finland en
dc.publisher VTT fi
dc.relation.ispartofseries VTT publications en
dc.relation.ispartofseries 559 en
dc.relation.haspart Kiihamäki, J. Deceleration of silicon etch rate at high aspect ratios. J. Vac. Sci. Technol. A, Vol. 18, No. 4, (2000), pp. 1385-1389. [article1.pdf] © 2000 American Vacuum Society. By permission
dc.relation.haspart Karttunen, J., Kiihamäki, J., Franssila, S. Loading effects in deep silicon etching. Proc. SPIE, Vol. 4174, (2000), pp. 90-97. [article2.pdf] © 2000 International Society of Optical Engineering (SPIE). By permission
dc.relation.haspart Kiihamäki, J. Measurement of oxide etch rate of SOI structure using near IR microscopy. Physica Scripta, Vol. T101, (2002), pp. 185-187.
dc.relation.haspart Kaajakari, V., Mattila, T., Oja, A., Kiihamäki, J., Seppä, H. Square-extensional mode single-crystal silicon micromechanical resonator for low-phase-noise oscillator applications. IEEE Electron Device Letters, Vol. 25, No. 4, (2004), pp. 173-175. [article4.pdf] © 2004 IEEE. By permission
dc.relation.haspart Kiihamäki, J., Dekker, J., Pekko, P., Kattelus, H., Sillanpää, T., Mattila, T. 'Plug-Up' – A new concept for fabricating SOI MEMS devices. Microsystem Technologies, Vol. 10, No. 5, (2004), pp. 346-350. [article5.pdf] © 2004 Springer-Verlag. By permission
dc.relation.haspart Kiihamäki, J., Ronkainen, H., Pekko, P., Kattelus, H., Theqvist, K. Modular integration of CMOS and SOI-MEMS Using 'Plug-Up' concept. Digest of Technical Papers The 12th International Conference on Solid-State Sensors, Actuators and Microsystems, Vol. 2. Institute of Electrical and Electronics Engineers, (2003), pp. 1647-1650. [article6.pdf] © 2003 IEEE. By permission
dc.subject.other Electrical engineering en
dc.title Fabrication of SOI micromechanical devices en
dc.type G5 Artikkeliväitöskirja fi
dc.description.version reviewed en
dc.contributor.department Department of Electrical and Communications Engineering en
dc.contributor.department Sähkö- ja tietoliikennetekniikan osasto fi
dc.subject.keyword silicon-on-insulator en
dc.subject.keyword SOI en
dc.subject.keyword micromechanics en
dc.subject.keyword MEMS en
dc.subject.keyword microfabrication en
dc.subject.keyword HARMST en
dc.subject.keyword DRIE en
dc.subject.keyword etching en
dc.subject.keyword vacuum cavities en
dc.subject.keyword resonators en
dc.subject.keyword monolithic integration en
dc.identifier.urn urn:nbn:fi:tkk-004849
dc.type.dcmitype text en
dc.type.ontasot Väitöskirja (artikkeli) fi
dc.type.ontasot Doctoral dissertation (article-based) en


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