Optimization of the thermal treatments processes in vertical oxidation furnaces

Abstract

The field of semiconductors is growing continuously with the influx of technologies ever more complex. The manufacturing process of semiconductors is highly dense and sensitive, thus, we have to make it the most reliable as possible to optimize the efficiency and minimize the losses. Soitec is one of the world leaders in the manufacturing of semiconductors. The company transforms bulk silicon wafers into an assembly of layers: Silicon On Insulator (SOI). This transformation contains a series of stages including thermal oxidations that are processed inside vertical oxidation furnaces. These processes are guided by recipes that give the instructions to the equipment: temperature, gas flows, robot motion... In order to secure and enhance our processes, we have standardized the method of creation of recipes thanks to Golden structures. They are the foundations for the creation of production recipes and aim to prevent from the apparition of failures during processes and thus defaults on silicon wafers. This thesis relates the several dry runs performed to create the Golden structures, and then the ones to test the Golden structures. The hardware used for experimentation are vertical oxidation furnaces from the ASM (Advanced Semiconductors Materials) brand. The examinations show consistent outcomes: neither alarms nor breakdowns have been declared, and the wafers processed with Golden recipes were conformed to specifications.

Moreover, the average duration time of recipes has been reduced, so the throughput is improved with the Golden format. After a few adjustments on the oxidation time and temperature, we proceeded to the production launch of the first furnace possessing only Golden recipes. The next priority concerning the Golden project is the conversion of all ASM tools into the Golden format. It is a long term project answering to a quality challenge.