Development of the speed and convergence of APLAC's DC analysis by means of interpolated and piecewise-linear models

Roos, Janne

dc.contributor	Aalto-yliopisto	fi
dc.contributor	Aalto University	en
dc.contributor.author	Roos, Janne
dc.date.accessioned	2021-04-14T18:20:23Z
dc.date.available	2021-04-14T18:20:23Z
dc.date.issued	1996
dc.identifier.uri	https://aaltodoc.aalto.fi/handle/123456789/105581
dc.format.extent	97
dc.language.iso	en	en
dc.title	Development of the speed and convergence of APLAC's DC analysis by means of interpolated and piecewise-linear models	en
dc.title	APLACin DC-analyysin nopeuden ja suppenemisen kehittäminen interpoloitujen ja paloittain lineaaristen mallien avulla	fi
dc.contributor.school	Teknillinen korkeakoulu	fi
dc.contributor.school	Helsinki University of Technology	en
dc.contributor.department	Sähkötekniikan osasto	fi
dc.subject.keyword	DC analysis	en
dc.subject.keyword	interpolation	en
dc.subject.keyword	lookup tables	en
dc.subject.keyword	nonlinear circuits	en
dc.subject.keyword	piecewise-linear models	en
dc.identifier.urn	URN:NBN:fi:aalto-202104144871
dc.programme.major	Teoreettinen sähkötekniikka	fi
dc.programme.mcode	S-55	fi
dc.type.ontasot	Licentiate thesis	en
dc.type.ontasot	Lisensiaatintyö	fi
dc.contributor.supervisor	Valtonen, Martti
local.aalto.openaccess	no
local.aalto.digifolder	Aalto_39698
dc.rights.accesslevel	closedAccess
local.aalto.idinssi	11233
dc.type.okm	G3 Lisensiaatintutkimus
local.aalto.digiauth	ask