Development of the speed and convergence of APLAC's DC analysis by means of interpolated and piecewise-linear models

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Volume Title
Helsinki University of Technology | Licentiate thesis
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Author
Date
1996
Department
Sähkötekniikan osasto
Major/Subject
Teoreettinen sähkötekniikka
Mcode
S-55
Degree programme
Language
en
Pages
97
Series
Description
Supervisor
Valtonen, Martti
Keywords
DC analysis, interpolation, lookup tables, nonlinear circuits, piecewise-linear models
Other note
Citation
Permanent link to this item
https://urn.fi/URN:NBN:fi:aalto-202104144871
Collections
[lic] Teknillinen korkeakoulu / TKK