Development of the speed and convergence of APLAC's DC analysis by means of interpolated and piecewise-linear models



Title:	Development of the speed and convergence of APLAC's DC analysis by means of interpolated and piecewise-linear models APLACin DC-analyysin nopeuden ja suppenemisen kehittäminen interpoloitujen ja paloittain lineaaristen mallien avulla
Author(s):	Roos, Janne
Date:	1996
Language:	en
Pages:	97
Department:	Sähkötekniikan osasto
Major/Subject:	Teoreettinen sähkötekniikka
Supervising professor(s):	Valtonen, Martti
Keywords:	DC analysis, interpolation, lookup tables, nonlinear circuits, piecewise-linear models
	OEVS yes
» Show full item record
Permanent link to this item: http://urn.fi/URN:NBN:fi:aalto-202104144871 Email this Export to RefWorks QR Code Print BibTex Tweet